Keyboard Work - setting up PLIC, UART, Interrupts

2026-02-10 01:21:49 +00:00 · 2026-02-10 01:21:49 +00:00 · 50757427be
commit 50757427be
parent 4c0a4958a2
12 changed files with 295 additions and 68 deletions
--- a/src/boot/entry.S
+++ b/src/boot/entry.S
@ -1,22 +1,20 @@
-.section .text
+.section .text.boot
 .global _start
 _start:
-    la sp, stack_top      # Set up the stack pointer
-    la t0, trap_entry     # Set up the trap handler
-    csrw mtvec, t0        # Set the trap vector to our trap handler
-    li t0, 0x00006000     # Load the mask for FS bits. enable float
-    csrs mstatus, t0      # Set the FS bits to 11 (Dirty/Initial). enable float
-    call kmain            # Jump to our C code
+    # 1. Set up the stack pointer using the symbol from our linker script
+    la sp, stack_top      
+
+    # 2. Set up the trap handler (pointing to the one in traps.S)
+    la t0, trap_entry     
+    csrw mtvec, t0        
+
+    # 3. Enable FPU (Floating Point)
+    li t0, 0x00006000     
+    csrs mstatus, t0      
+
+    # 4. Jump to C
+    call kmain            
+
 loop:
-    wfi                   # Wait for Interrupt (saves CPU)
-    j loop                # Infinite loop if C returns
-.align 4
-trap_entry:
-    csrr a0, mcause    # Argument 1: mcause
-    csrr a1, mepc      # Argument 2: mepc
-    j handle_trap
-.section .bss
-.align 16
-stack_low:
-    .skip 4096            # 4KB of stack space
-stack_top:
+    wfi                   
+    j loop
--- a/src/boot/traps.S
+++ b/src/boot/traps.S
@ -0,0 +1,83 @@
+# traps.S
+.section .text
+.align 4             # mtvec requires 4-byte alignment
+.global trap_entry
+
+trap_entry:
+    # 1. Create space on the stack for 32 registers (32 * 8 = 256 bytes)
+    addi sp, sp, -256
+
+    # 2. Save all General Purpose Registers (GPRs)
+    # We don't save x0 (zero) because it's always zero
+    sd ra, 0(sp)
+    sd gp, 8(sp)
+    sd tp, 16(sp)
+    sd t0, 24(sp)
+    sd t1, 32(sp)
+    sd t2, 40(sp)
+    sd s0, 48(sp)
+    sd s1, 56(sp)
+    sd a0, 64(sp)
+    sd a1, 72(sp)
+    sd a2, 80(sp)
+    sd a3, 88(sp)
+    sd a4, 96(sp)
+    sd a5, 104(sp)
+    sd a6, 112(sp)
+    sd a7, 120(sp)
+    sd s2, 128(sp)
+    sd s3, 136(sp)
+    sd s4, 144(sp)
+    sd s5, 152(sp)
+    sd s6, 160(sp)
+    sd s7, 168(sp)
+    sd s8, 176(sp)
+    sd s9, 184(sp)
+    sd s10, 192(sp)
+    sd s11, 200(sp)
+    sd t3, 208(sp)
+    sd t4, 216(sp)
+    sd t5, 224(sp)
+    sd t6, 232(sp)
+
+    # 3. Call your C handler
+    # The CPU already put the cause in 'mcause', so C can read it
+    call handle_trap
+
+    # 4. Restore all GPRs
+    ld ra, 0(sp)
+    ld gp, 8(sp)
+    ld tp, 16(sp)
+    ld t0, 24(sp)
+    ld t1, 32(sp)
+    ld t2, 40(sp)
+    ld s0, 48(sp)
+    ld s1, 56(sp)
+    ld a0, 64(sp)
+    ld a1, 72(sp)
+    ld a2, 80(sp)
+    ld a3, 88(sp)
+    ld a4, 96(sp)
+    ld a5, 104(sp)
+    ld a6, 112(sp)
+    ld a7, 120(sp)
+    ld s2, 128(sp)
+    ld s3, 136(sp)
+    ld s4, 144(sp)
+    ld s5, 152(sp)
+    ld s6, 160(sp)
+    ld s7, 168(sp)
+    ld s8, 176(sp)
+    ld s9, 184(sp)
+    ld s10, 192(sp)
+    ld s11, 200(sp)
+    ld t3, 208(sp)
+    ld t4, 216(sp)
+    ld t5, 224(sp)
+    ld t6, 232(sp)
+
+    # 5. Shrink the stack back
+    addi sp, sp, 256
+
+    # 6. Return from Machine-mode trap
+    mret